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1. #SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER FULL#
2. #SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER SOFTWARE#

If the ADC is to operate over a large temperature The ADC has a temperature dependent offset. If CH.CONFIG.REFSEL=0, the input range of the ADC core is nominally ☐.6 Vĭifferential and the input must be scaled accordingly. The ADC has a wide selection of gains controlled in the GAIN field of the CH.CONFIG Settling errors due to high source impedance and sampling jitter. The result can also vary due to AC errors like non-linearities in the GAIN block, See Electrical specification for details on these The result generated by the ADC will deviate from the expected due DC errors like offset, gain,ĭifferential non-linearity (DNL), and integral non-linearity (INL). Where V(P) is the voltage at input P V(N) is the voltage at input N GAIN is the selected gain setting REFERENCE is the selected reference voltageĪnd m=0 if CONFIG.MODE=SE, or m=1 if CONFIG.MODE=Diff. Registers as follows: RESULT = * GAIN/REFERENCE * 2 (RESOLUTION - m) The output result of the ADC depends on the settings in the CH.CONFIG and RESOLUTION

#SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER FULL#

Interrupts on single sample and full buffer events.Support for direct sample transfer to RAM using EasyDMA.

T ack + t conv which may vary between channels according to user

#SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER SOFTWARE#

Sampling triggered via a task from software or a PPI channel for full flexibility on sampleįrequency source from low power 32.768kHz RTC or more accurate 1/16MHz Timers.Scan mode can be configured with both single-ended channels and differential channels.One channel per single-ended input and two channels per differential input.8/10/12-bit resolution, 14-bit resolution with oversampling.Listed here are the main features of SAADC: The ADC is a differential successive approximation register (SAR) analog-to-digital